Senior AMS Designer-with many years experience
 	
 -A motivated and enthusiastic Analog IC Design Engineer with several years of experience in semiconductor industry.
 	
 -IC Physical design Engineer, Precision ADC (PADC) group member for automotive and Industrial applications.
 	
 -Expertise layout of the following blocks: Floorplan to GDSII, OpAmps, SARADC, Sigma delta ADC, Switch-Cap Array, Bandgaps, Voltage-reference, LF-Receiver, Oscillators, PLL, Comparators, Level-Shifters and Bias-generators in 0.18um CMOS process.
 	
 -Test-chip layout lead.
 	
 -Full custom Diodes & SCRs for ESD protections, in BCDMOS_60V.
 	
 -Layout verifications: LVS, DRC, ESD, GENLAYER, ANTENNA, Parasitic-Extraction.