E-11118

Area of expertise: ASIC Verification
Core Technologies: Automotive
Experience: 9 years
Time On Site: 10%
A decade of experience in ASIC Verification
Verification languages: Specman (eRM), SystemVerilog (UVM)
Experience in Hardware Digital Development: 5 years
HDL Languages: Verilog, VHDL
HDL simulators: Incisive, Xcelium, VCS, Verdi
Protocols: I2C, SPI, UART, HDMI, HDBaseT, AXI, AHB, OCP, PCIE
Mentor and train several engineers in SV UVM