Area of expertise: ASIC Design
Core Technologies: IoT (Internet of Things)
Experience: 25 years
Time On Site: 0%
HDL: Verilog/SystemVerilog 
Verification Methodologies: UVM, SVA, CDC (clock domain crossing) 
Programming and scripting languages: C, assembler, C++, TCL 
Simulation tools: Matlab, Verilog Simulators 
Synthesis related tools: dc_shell, pt_shell, fm_shell 
DFT: tmax 
Comfortable with LTI system analysis/control theory. 
Comfortable with DSP techniques (DFT, convolution, S/H, PI controllers) implemented with fixed point