ASIC/FPGA Principal Verification Engineer with experience delivering complex digital verification solutions for leading semiconductor companies, including Cadence, Qorvo & Intel Movidius.
 	
Experienced with protocols such as UCIE, PCIe, InfiniBand, Ultra-Wideband (UWB), MIPI and AMBA, with additional exposure to formal verification techniques.
 	
Specialized in architecting scalable UVM-based environments and driving verification strategies from block-level to SoC and gate-level.