Verification Engineer

Salary: Very Attractive Rate
Location:
Full Time
UVM Verification Engineer in Cork (Ireland)
You will be part of the WLAN development Team. Working closely with signal processing and digital design teams, you will participate in the development of our 802.11ax WLAN modem.
You have the following skills:
  • 5+ years’ experience of the design and/or verification of RTL (Verilog)
  • Advanced knowledge of SystemVerilog and Constrained Random simulation
  • Experience of using UVM
    • Strong knowledge of the features of the UVM library
    • Experience of designing and implementing UVM derived testbenches
  • Strong knowledge of object oriented programming features
  • Use of digital simulation tools such as Cadence IES/XCelium or Synopsis VCS
  • Use of code coverage tools such as IMC
  • Good debug skills
 
The following skills are considered as a plus:
  • Knowledge in Wi-Fi
  • Knowledge in Wireless communication systems
 
A good level of English is needed, you are rigorous, polyvalent, you are a good team player and you have good interpersonal skills.