ASIC verification Engineer

Salary: Excellent rate available
Location: United Kingdom
Contract 
ASIC Verification Engineer

Required skills

Experience with SystemVerilog for verification and knowledge of UVM.
Experience of architecting and implementing functional verification environments for complex IP.
Ability to quickly understand and apply complex specification details.
Willingness to seek varied and complex technical challenges.
Strong communication skills and ability to work well as part of a team.
Desirable skills

Experience with Machine Intelligence, Neural Networks or Computer Vision.
Experience with UNIX development environments and scripting skills.
Knowledge of C/C++.
Experience with formal verification.
Working and communicating with remote design centres.

Skills

  • systemVerilog OVM UVM VMM Verilog VHDL SVA Assertions Verification engineer Constrained Random Functional Coverage UPF Power aware Tcl perl python C C++ Vera Specman e Consultant Contractor Full time permanent Freelancer Questa NCSIM VCS Digital ASIC FPGA SoC Architecture