Analog IC Layout Engineer(s)

Salary: Very Attractive Rate
Senior Analog IC Layout Engineer

Qualification and Experience
Minimum  Bachelor degree in Electronics or an equivalent
Minimum 5 Years  experience as an IC Layout Designer with strong Analog/Mixed-Signal layout skills
Experience working on Readout Sensors in relation to an Infrared for Space Communications 
Analog Layout design skills and capability of solving device matching
Experience with Cadence layout tools is required (Virtuoso, PVS DRC & LVS, QRC Extraction)
Ability to debug and resolve LVS/DRC errors independently
Experience with advanced CMOS nodes is a plus
Must be able to communicate effectively with circuit designers to understand their requirements and implement the requested layout
Possess necessary skill set to complete any assigned layout task with minimal supervision
Understanding of Layout effects on circuit performance is a plus
Experience in the layout of ADCs, LNAs,   
Team player with a critical attitude and sense of initiative - You are a professional who can deliver high-quality work on tight schedules


  • Analog
  • RF
  • AMS
  • Analog
  • CMOS
  • SiGe
  • NMOS
  • PMOS
  • BiCMOS
  • BiPolar
  • LNAs
  • Mixers
  • LDOs
  • drivers
  • VCOs
  • PLLs
  • RF Transceivers
  • millimetre-wave Design
  • High Speed
  • finFET
  • FF
  • mmWave Design
  • K band
  • Ku band
  • Ka band
  • Labview
  • RF Test
  • Advantest
  • Layer 1
  • LTE
  • 4G
  • 3G
  • Design Packages
  • BiCMOS
  • CMOS