Chipright are seeking an Experienced analog designer with radiation hardened SRAM blocks design experience 
 
Job description

You will participate in the activities of a team of analog, library and memory designers and analog layout engineers. 
 
Responsibilities: 
Perform transistor level SRAM memory cell plus block design and layout from specification to documentation according to the imec rad-hard development flow
Report regularly your design and layout progress of the memory development.
Document your results and present them clearly in review meetings to other analog design engineers
 Requirements:
  
Good understanding of CMOS technologies as well as several years of experience with the analog design flow including schematic design, simulation with parasitics and full custom layout
A high level of efficient use of Cadence design tools is a must, as well as experience with Calibre tools for physical verification
Strong experience with SRAM design is highly preferred
Experience with TSMC 65nm is highly preferred
Knowledge of memory compiler implementation is a plus
Knowledge of radiation effects on semiconductors and mitigation techniques is beneficial
Fluent English, both written and spoken
  


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Call us on +353 91 444168 or contact  Richie on richard.hunt@chipright or Annette Burke on annette.burke@chipright.com