FPGA/IP Design Engineer
  
The Person:
  
 	
A creative, innovative thinker who enjoys tackling complex technical challenges and detail-oriented tasks
 	
 	
Demonstrates a strong, consistent commitment to helping the team achieve high-quality results on schedule
 	
 	
Driven to learn, grow, and perform at their highest technical potential
 	
 	
Comfortable contributing both independently and within a team environment
 	
 	
Possesses excellent written and verbal communication skills
 	
 	
Communicates clearly and openly in meetings, presentations, emails, and technical reports
 	
 	
Able to learn new concepts independently and quickly acquire job-relevant skills
 	
 	
Has deep expertise in Adaptive SoC/FPGA design, including synthesis, place-and-route, and timing closure
 	
 	
Experienced in RTL design using HDL languages such as SystemVerilog or VHDL
 	
 	
Proven experience delivering Adaptive SoC/FPGA designs and IP within a structured development process
 	
  
Key Responsibilities:
  
 	
Provide technical leadership and drive projects from initial requirements through final design validation
 	
 	
Collaborate with systems and software engineers to define the overall architecture
 	
 	
Write and review design specifications and test plans
 	
 	
Develop systems targeting Adaptive SoC/FPGA across all phases of the design lifecycle
 	
 	
Diagnose, triage, and resolve design and implementation issues
 	
  
Preferred Experience:
  
 	
Hands-on experience with AMD-Xilinx Adaptive SoC/FPGA toolchains and workflows (Vivado/Vitis)
 	
 	
Proficiency with scripting languages such as Python, TCL, or similar
 	
 	
Familiarity with hardware-software co-design and performance optimization
 	
 	
Experience integrating with real-time operating systems (RTOS) and embedded Linux
 	
 	
Comfortable collaborating with distributed, cross-geographical teams
 	
  
Academic Credentials:
  
 	
Bachelor’s or Master’s degree in Electronic Engineering, Computer Engineering, or a related discipline