Senior SoC/NoC Verification Engineer

About the Role:
We are seeking a highly experienced SoC/NoC Functional Verification Engineer with a strong background in verifying complex System-on-Chip (SoC) architectures. The ideal candidate will have successfully verified 7–10 SoCs throughout their career and demonstrated deep expertise in UVM-SystemVerilog-based environments, SVA, and testbench development.
You will play a key technical role in defining verification strategies, building scalable testbenches, driving verification closure, and mentoring junior engineers.

Key Responsibilities:
Lead and execute functional verification of complex SoC/NoC designs from specification through tape-out.
Develop, enhance, and maintain UVM-based verification environments in SystemVerilog.
Create comprehensive test plans, testbenches, assertions (SVA), coverage models, and checkers.
Verify and validate AMBA (AXI, AHB, APB), DDR, MIPI, and various peripheral interfaces (JTAG, I²C, SPI, etc.).
Perform debug and root-cause analysis on design and testbench issues, collaborating closely with RTL designers and architects.
Define and drive coverage closure strategies to meet verification quality goals.
Contribute to verification methodology improvements and automation frameworks.
Mentor junior verification engineers and contribute to technical reviews.

Required Qualifications:

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
10+ years of hands-on experience in SoC/NoC functional verification.
Proven track record of verifying 7–10 SoCs across multiple technology nodes or product lines.
Deep expertise in:
UVM (Universal Verification Methodology)
SystemVerilog and SVA (SystemVerilog Assertions)
Constrained random and coverage-driven verification
Strong understanding of industry-standard protocols including:
AMBA (AXI, AHB, APB)
DDR memory interfaces
High-speed interfaces (MIPI, PCIe, etc.)
Peripheral interfaces (JTAG, I²C, SPI, UART, etc.)

Experience with simulation tools (e.g., Synopsys VCS, Cadence Xcelium, Mentor Questa) and debug tools.