{"ID":20217,"post_author":"132","post_date":"2025-05-15 10:54:37","post_date_gmt":"2025-05-15 09:54:37","post_content":"

AMS design and verification Engineer<\/li>\r\n \t
-Modeling:<\/li>\r\n \t
\u00a0-Design of WREAL\/VAMS models according to schematics and specifications<\/li>\r\n \t
\u00a0-Matching model vs schematics<\/li>\r\n \t
\u00a0-Integration in top level<\/li>\r\n \t
\u00a0-Design and simulation of simple models (VAMS, WREAL and VHDL)<\/li>\r\n \t
-Top level mixed-signal verification:<\/li>\r\n \t
\u00a0-Writing tests regarding test cases specification<\/li>\r\n \t
\u00a0-Running and debugging simulation<\/li>\r\n \t
-Digital verification:<\/li>\r\n \t
\u00a0-Running and debugging regression<\/li>\r\n \t
\u00a0-IP coverage closure (writing tests, basic UVC component development)<\/li>\r\n \t
\u00a0-SystemVerilog verification environment implementation according to UVM methodology<\/li>\r\n \t
\u00a0-Writing testbench and test configuration<\/li>\r\n \t
\u00a0-Verification plan and table of checkers<\/li>\r\n<\/ul>","post_title":"E-69177","post_excerpt":"","post_status":"publish","comment_status":"open","ping_status":"open","post_password":"","post_name":"e-69177","to_ping":"","pinged":"","post_modified":"2025-05-16 11:24:09","post_modified_gmt":"2025-05-16 10:24:09","post_content_filtered":"","post_parent":0,"guid":"http:\/\/www.chipright.com\/candidate\/e-69177\/","menu_order":0,"post_type":"candidate","post_mime_type":"","comment_count":"0","filter":"raw","meta":{"desired_position":"Contract","best_fit":"Analog Mixed Signal Verification","experience":"5","entity_type":"Individual","on_site":"0","technologies":"Automotive","contact":"Annette Burke","level":"Senior Engineer","_edit_lock":"1747393591:132","_edit_last":"132"}}

NO

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E-69177 | Chipright Chipright

E-69177

Area of expertise: Analog Mixed Signal Verification

Core Technologies: Automotive

Experience: 5 years

Time On Site: 0%


 	AMS design and verification Engineer
 	-Modeling:
 	 -Design of WREAL/VAMS models according to schematics and specifications
 	 -Matching model vs schematics
 	 -Integration in top level
 	 -Design and simulation of simple models (VAMS, WREAL and VHDL)
 	-Top level mixed-signal verification:
 	 -Writing tests regarding test cases specification
 	 -Running and debugging simulation
 	-Digital verification:
 	 -Running and debugging regression
 	 -IP coverage closure (writing tests, basic UVC component development)
 	 -SystemVerilog verification environment implementation according to UVM methodology
 	 -Writing testbench and test configuration
 	 -Verification plan and table of checkers

Contact Us

+353 91 444 168

info@chipright.com

Unit 8B, Galway Technology Centre, Galway, Ireland

E-69177

Area of expertise: Analog Mixed Signal Verification

Core Technologies: Automotive

Experience: 5 years

Time On Site: 0%


 	AMS design and verification Engineer
 	-Modeling:
 	 -Design of WREAL/VAMS models according to schematics and specifications
 	 -Matching model vs schematics
 	 -Integration in top level
 	 -Design and simulation of simple models (VAMS, WREAL and VHDL)
 	-Top level mixed-signal verification:
 	 -Writing tests regarding test cases specification
 	 -Running and debugging simulation
 	-Digital verification:
 	 -Running and debugging regression
 	 -IP coverage closure (writing tests, basic UVC component development)
 	 -SystemVerilog verification environment implementation according to UVM methodology
 	 -Writing testbench and test configuration
 	 -Verification plan and table of checkers

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E-69177

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