Professional Skills: Analog IC Layout and Verification. Extensive experience in IP level layout design, DRC, Antenna, MRC and LVS verification.
 	
System Requirement and architecture Specification. Skilled interpreting and defining system requirements and architectural specifications.
 	
Programming Languages: Proficient in Matlab, C, C++, HTML, CSS.
 	
Design Tools Expertise in Cadence Encounter Platform, Altium Designer
 	
Technologies: Knowledgeable in FinFet 16nm, Samsung 14nm, Planar Technology: 22nm, 28nm, 40nm, 50nm,
55nm, 90nm, 130nm, 140nm, 180nm (TSMC/UMC/GF/LBC9).
 	
Leadership: Proven ability to lead cross-functional teams, mentor junior engineers and support a collaborative
work environment.