\r\nSenior Test Development Engineers\u00a0<\/b>\r\nChipright seeks a highly motivated and experienced test engineer to work in validating our Irish customer\u2019s latest design using J750. The candidate should have hands on experience in debugging silicon tests and must be proficient with ATE Engineering, Product\u00a0Characterization & qualification\u00a0testing.\r\nResponsibilities:\r\n\r\n \tPlan and arranges the labor, schedules, and equipment required for testing and evaluating standard and special devices.<\/li>\r\n \t Provide test area with parameters for sampling testing and specifies tests to be performed.<\/li>\r\n \t Compile data and defines changes required in testing equipment, testing procedures, manufacturing processes, or new testing requirements.<\/li>\r\n \t Test all customer samples and for special tests that cannot be performed in the test area.<\/li>\r\n \t Respond to customer\/client requests or events as they occur.<\/li>\r\n \t Develops solutions to problems utilizing formal education and judgement.<\/li>\r\n \t Work closely with various Design teams' programmable logic, memory, digital IP, analog and high-speed SERDES from the initial IP\/product planning phase through design implementation and verification.<\/li>\r\n \t Define test methodologies, developing test benches & run simulations, deploy test patterns and validating them on silicon.<\/li>\r\n \t Supports product teams with yield improvement and interface characterization.<\/li>\r\n \t The engineer may be able to work part remote (for eg. 3 days onsite\/ 2 days offsite)<\/li>\r\n<\/ul>\r\nQualifications:-<\/b>\r\n\r\n \tBSEE with 6+ years test program development experience<\/li>\r\n \t Fully understand digital testing and DFx<\/li>\r\n \t Knowledge of ATE tester with programming skills<\/li>\r\n \t Hi-Speed SERDES test experience- Script TCL\/PERL\/Python and programming languages Visual Basic and C\/C++<\/li>\r\n \t Hands-on problem solving skills including hardware and software<\/li>\r\n \t Preferred Qualifications:<\/li>\r\n \t MSEE with 6+ years test program development experience<\/li>\r\n \t Test experience with digital\/analog\/mix-signal products<\/li>\r\n \t Teradyne J750 and Advantest test development skills<\/li>\r\n \t Full understanding of DFx implementation and debugging of SCAN\/BIST<\/li>\r\n \t Pre-silicon simulation experience and tools of pattern conversion<\/li>\r\n \t Team technical lead<\/li>\r\n<\/ul>\r\n<\/td>\r\n<\/tr>\r\n<\/tbody>\r\n<\/table>","post_title":"Senior Test Development Engineers with J750 experience","post_excerpt":"","post_status":"publish","comment_status":"closed","ping_status":"open","post_password":"","post_name":"senior-test-development-engineers-with-j750-experience-2","to_ping":"","pinged":"","post_modified":"2022-06-24 16:00:42","post_modified_gmt":"2022-06-24 15:00:42","post_content_filtered":"","post_parent":0,"guid":"http:\/\/www.chipright.com\/job\/senior-test-development-engineers-with-j750-experience-2\/","menu_order":0,"post_type":"job_listing","post_mime_type":"","comment_count":"0","filter":"raw","meta":{"_company_tagline":"","_company_description":"","skills":"Test Engineering, Post Silicon, Tcl, perl, python, C, C++, DFT, DFM, Validation, Process Characterization, Device Characterization, Test strategies, Test Plans, ATPG, BIST, BSCAN, SCAN, JLCC, JTAG, ATE, Debugging, Schematic Capture, PCB layout, Test Vectors+-","_job_location":"Ireland","_application":"cv@chipright.com","contact":"null","_job_expires":"2200-03-11","_filled":"0","advertised_rate":"Very Attractive Rate","_company_logo":"","_featured":"0","_company_facebook":"","_company_twitter":"","_company_linkedin":"","_company_google":"","_goft_external_link":"http:\/\/chipright.force.com\/careers\/ts2__jobdetails?jobId=a0Ko0000009V5AOEA0","_goft_wpjm_is_external":"1","_company_website":"","_goft_source_data":"a:0:{}","_company_video":"","geolocated":"1","_company_name":"","jobscience_jobid":"JO-1904-974","_edit_lock":"1734621344:132","_edit_last":"2","_contact":"field_585b9b8d4c53d","_aioseop_title":"Experienced Test engineering job in the Micro Chip semiconductor Industry","_aioseop_description":"We are recruiting a test IC resource with proven Advantest Experience. An engineer with experience in the development, debug and optimization of T2000 semiconductor test systems. Knowledge of Python programming, National Instrument LabVIEW and\/or TestStand is a critical requirement"}}Experienced Test engineering job in the Micro Chip semiconductor Industry | Chipright
Experienced Test engineering job in the Micro Chip semiconductor Industry
Senior Test Development Engineers with J750 experience
Salary: Very Attractive Rate
Location:
Senior Test Development Engineers
Chipright seeks a highly motivated and experienced test engineer to work in validating our Irish customer’s latest design using J750. The candidate should have hands on experience in debugging silicon tests and must be proficient with ATE Engineering, Product Characterization & qualification testing.
Responsibilities:
Plan and arranges the labor, schedules, and equipment required for testing and evaluating standard and special devices.
Provide test area with parameters for sampling testing and specifies tests to be performed.
Compile data and defines changes required in testing equipment, testing procedures, manufacturing processes, or new testing requirements.
Test all customer samples and for special tests that cannot be performed in the test area.
Respond to customer/client requests or events as they occur.
Develops solutions to problems utilizing formal education and judgement.
Work closely with various Design teams' programmable logic, memory, digital IP, analog and high-speed SERDES from the initial IP/product planning phase through design implementation and verification.
Define test methodologies, developing test benches & run simulations, deploy test patterns and validating them on silicon.
Supports product teams with yield improvement and interface characterization.
The engineer may be able to work part remote (for eg. 3 days onsite/ 2 days offsite)
Qualifications:-
BSEE with 6+ years test program development experience
Fully understand digital testing and DFx
Knowledge of ATE tester with programming skills
Hi-Speed SERDES test experience- Script TCL/PERL/Python and programming languages Visual Basic and C/C++
Hands-on problem solving skills including hardware and software
Preferred Qualifications:
MSEE with 6+ years test program development experience
Test experience with digital/analog/mix-signal products
Teradyne J750 and Advantest test development skills
Full understanding of DFx implementation and debugging of SCAN/BIST
Pre-silicon simulation experience and tools of pattern conversion
Team technical lead
Senior Test Development Engineers with J750 experience
Salary: Very Attractive Rate
Location: N/A
Senior Test Development Engineers
Chipright seeks a highly motivated and experienced test engineer to work in validating our Irish customer’s latest design using J750. The candidate should have hands on experience in debugging silicon tests and must be proficient with ATE Engineering, Product Characterization & qualification testing.
Responsibilities:
Plan and arranges the labor, schedules, and equipment required for testing and evaluating standard and special devices.
Provide test area with parameters for sampling testing and specifies tests to be performed.
Compile data and defines changes required in testing equipment, testing procedures, manufacturing processes, or new testing requirements.
Test all customer samples and for special tests that cannot be performed in the test area.
Respond to customer/client requests or events as they occur.
Develops solutions to problems utilizing formal education and judgement.
Work closely with various Design teams' programmable logic, memory, digital IP, analog and high-speed SERDES from the initial IP/product planning phase through design implementation and verification.
Define test methodologies, developing test benches & run simulations, deploy test patterns and validating them on silicon.
Supports product teams with yield improvement and interface characterization.
The engineer may be able to work part remote (for eg. 3 days onsite/ 2 days offsite)
Qualifications:-
BSEE with 6+ years test program development experience
Fully understand digital testing and DFx
Knowledge of ATE tester with programming skills
Hi-Speed SERDES test experience- Script TCL/PERL/Python and programming languages Visual Basic and C/C++
Hands-on problem solving skills including hardware and software
Preferred Qualifications:
MSEE with 6+ years test program development experience
Test experience with digital/analog/mix-signal products
Teradyne J750 and Advantest test development skills
Full understanding of DFx implementation and debugging of SCAN/BIST
Pre-silicon simulation experience and tools of pattern conversion
Team technical lead
Skills
Test Engineering Post Silicon Tcl perl python Process Characterization Device Characterization Test strategies Test Plans ATPG ATE Debugging Schematic Capture PCB layout Test Vectors+-
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