Experienced ASIC Verification Engineer with over a decade of expertise in SoC verification, specializing in SystemVerilog and UVM-based environments.
 	
Proven track record in leading verification teams, developing reusable VIP, and delivering high-quality verification solutions for complex ARM-based architectures.
 	
Strong background in AMBA protocols, coverage-driven verification, and full project lifecycle execution, with a focus on performance, functional accuracy, and scalable design methodologies.
 	
Recognized for technical leadership, mentoring, and driving successful milestone deliveries in fast-paced semiconductor environments.