Experienced in full-custom IC Layout with primary focus in Analog/Mixed-Signal, RF and IOT Power Management layout.
 	
Analog and mixed-signal, RF, IOT(power).
 	
Deep sub-micron layout effects considerations: WPE, LOD, STI.
 	
Device matching, parasitic effects (resistance, capacitance, inductance), electromigration/IR drop, antenna effects - 20nm, 28nm, 40nm, 60nm, 65nm, 90nm, 130nm TSMC BCD, 250nm BCD Vanguard(VIS), 180nm-RF SOI, 40nm GF, 0.35um X-Fab.
 	
Layout tools: Cadence Virtuoso, Laker - Verification: Calibre, PVS, Assura, Quantus QRC, Star RC, PVS QRC, Assura QRC, Apache Totem for EM/IR, Silicon Frontline?s R3D and P2P(3D resistance extractor and EM/IR analysis).
 	
Use of Virtuoso layout productivity tools: Module generator, wire assistant, floorplanner, constraint manager, non-timing driven auto-router, auto pin placement.