ASIC Physical Implementation Engineer


Chipright seeks highly motivated and experienced ASIC Digital Physical Design Engineer to work closely with our customer. We require an engineer to work with leading-edge EDA tools in delivering an RTL design to GDSII. This is a fantastic opportunity for talented engineers to work within a team of highly experienced engineers.
 

Requirements
7+ years experience in development of ASIC designs
Proficient with Cadence tools
Synthesis experience 
Experience with STA and timing constraints analysis
Experience with Place & Route, Layout Finishing
Experience with Design Rule Checking (DRC) and all aspects of Physical Verification
Experience with scripted flows – Tcl, Perl
Experience in working with EDA tool suppliers to yield the best results from their tools
Strong debug & problem-solving skills
Educated to degree level with excellent analytical, communication and documentation skills

Desirable

Redhawk
apache
Calibre
Nitro Soc