Full Custom Memory Layout Engineer

 	
Tasks will include performing full Custom Layout Design for MRAM ,  Designing layouts of various blocks and performing Chip Level verifications after tiling them as a single memory instance.
 	
Layout Design for various memory blocks such as Rowdecoder, Control, Sense Amplifer etc.
 	
Tiling blocks to create a single memory instance, and to perform Layout verifications.
 	
CHIP Level verification and signoff after making connections to the PAD.

Required knowledge and skills

 	
You must have have a minimum of 6+ years experience in a the role or similar position.
 	
You must possess a strong knowledge about Memory layout fundamentals, and have experience in designing layouts for deep submicron technologies;
 	
Should be able to perform all verifications like DRC, LVS, etc. and perform Full CHIP signoff.
 	
Some experience of designing SRAM would be an advantage.
 	
Some prior knowledge about SKILL coding would be an advantage also.
 	
Preparation of reports.