Senior Analog & Mixed Signal Layout Engineer with over 12 years experience
-Experience in the Layout design of flash memory products (NOR-PCM-NAND-3D NAND):
-Feasibility studies, floorplan, power plan
-Full custom blocks layout design, integration and routing
-Final layout verification checks (DRC, LVS, Antenna, XOR, etc.) and parasitic extraction
-Database management, archiving and tape-out Experience with Cadence and Mentor tools. Experience with VXL.
-High level proficiency in using Calibre and Hercules tools (LVS, DRC, ERC, parasitic Extraction, DFM ecc...)
-Experience of Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,