Area of expertise: Analog Layout
Core Technologies: Other
Experience: 8 years
Time On Site: 10%
Analog and Mixed Signal IC Layout Engineer.
Large experience working with a wide variety of technologies from 350nm down to 40 and 28nm deep sub micron CMOS, SOI and DT, and different applications 
Has worked on standard CMOS silicon, insulators, and general blocks, RF low power automotive to high power DC-DC and audio.
Mainly using cadence and calibre toolsuite and has worked on verification, extraction etc.
Also hold PWC coaching diploma and is passionate about training younger staff members