SOC Integration Engineer

Salary: Very Attractive Hourly Rate

We are searching for an experienced digital implementation engineer to help with design implementation of our world class lower power digital signal processor. Primary tasks include:
             Implementation of IP’s at module level and structurally at the chip top-level
             Verify the designs through relevant testcases and testbenches

The consultant shall have:
             Solid hands-on RTL design skills in VHDL or Verilog
             HDL simulators and viewers like VCS, DVE, Verdi, Incisive
             Verification methodologies and language such as SystemVerilog / UVM
             A strong passion for quality, understanding the importance of verification
             Experience with gate-level simulation
             Perl, Shell scripting, Makefiles or others

Preferred would be some experience with low power digital design methodology.